A new proposal of Arithmetic Logic Unit (ALU) to work with paraconsistent annotated logic

Abstract

It can be observed that the number and the complexity of the application's domains, where the Paraconsistent Annotated Logic has been used, have grown a lot in the last decade. This increase in the complexity of the application's domain is an extra challenge for the designers of such systems, once there are not suitable computer hardware to run paraconsistent systems. This work proposes a new hardware architecture for the building Paraconsistent system.