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DC Field | Value | Language |
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dc.contributor.author | Silva, Alexandre César Rodrigues da | - |
dc.contributor.author | Grout, I. A. | - |
dc.date.accessioned | 2014-05-20T15:33:03Z | - |
dc.date.accessioned | 2016-10-25T18:09:30Z | - |
dc.date.available | 2014-05-20T15:33:03Z | - |
dc.date.available | 2016-10-25T18:09:30Z | - |
dc.date.issued | 2011-09-01 | - |
dc.identifier | http://dx.doi.org/10.1109/TLA.2011.6030974 | - |
dc.identifier.citation | IEEE Latin America Transactions. Piscataway: IEEE-Inst Electrical Electronics Engineers Inc, v. 9, n. 5, p. 663-672, 2011. | - |
dc.identifier.issn | 1195-9479 | - |
dc.identifier.uri | http://hdl.handle.net/11449/41794 | - |
dc.identifier.uri | http://acervodigital.unesp.br/handle/11449/41794 | - |
dc.description.abstract | This paper presents a methodology and a tool for projects involving analogue and digital signals. A sub-systems group was developed to translation a Matlab/Simulink model in the correspondent structural model described in VHDL-AMS. The developed translation tool, named of MS(2)SV, can reads a file containing a Simulink model translating it in the correspondent VHDL-AMS structural code. The tool also creates the directories structure and necessary files to simulate the model translated in System Vision environment. Three models of D/A converters available commercially that use R-2R ladder network were studied. This work considers some of challenges set by the electronic industry for the further development of simulation methodologies and tools in the field of mixed-signal technology. Although the objective of the studies has been the D/A converter, the developed methodology has potentiality to be extended to consider control systems and mechatronic systems. | en |
dc.format.extent | 663-672 | - |
dc.language.iso | por | - |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | - |
dc.source | Web of Science | - |
dc.subject | high-level synthesis | en |
dc.subject | translation tool | en |
dc.subject | mixed-signal | en |
dc.subject | D/A converter | en |
dc.title | MS2SV: Tradução de modelos em Simulink para VHDL-AMS | pt |
dc.title.alternative | MS2SV: Environment for translation of Matlab/Simulink models to VHDL-AMS models | en |
dc.type | outro | - |
dc.contributor.institution | Universidade Estadual Paulista (UNESP) | - |
dc.contributor.institution | Univ Limerick | - |
dc.description.affiliation | UNESP, FEIS, Coll Engn, Ilha Solteira, SP, Brazil | - |
dc.description.affiliation | Univ Limerick, Dept Elect & Comp Engn, Limerick, Ireland | - |
dc.description.affiliationUnesp | UNESP, FEIS, Coll Engn, Ilha Solteira, SP, Brazil | - |
dc.identifier.doi | 10.1109/TLA.2011.6030974 | - |
dc.identifier.wos | WOS:000295527400010 | - |
dc.rights.accessRights | Acesso restrito | - |
dc.relation.ispartof | IEEE Latin America Transactions | - |
Appears in Collections: | Artigos, TCCs, Teses e Dissertações da Unesp |
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