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dc.contributor.authorBaldassin, Alexandro José-
dc.contributor.authorGoldstein, Felipe-
dc.contributor.authorAzevedo, Rodolfo-
dc.date.accessioned2014-05-20T15:33:24Z-
dc.date.accessioned2016-10-25T18:09:57Z-
dc.date.available2014-05-20T15:33:24Z-
dc.date.available2016-10-25T18:09:57Z-
dc.date.issued2012-12-01-
dc.identifierhttp://dx.doi.org/10.1016/j.jpdc.2012.08.001-
dc.identifier.citationJournal of Parallel and Distributed Computing. San Diego: Academic Press Inc. Elsevier B.V., v. 72, n. 12, p. 1535-1546, 2012.-
dc.identifier.issn0743-7315-
dc.identifier.urihttp://hdl.handle.net/11449/42030-
dc.identifier.urihttp://acervodigital.unesp.br/handle/11449/42030-
dc.description.abstractSingle-core architectures have hit the end of the road and industry and academia are currently exploiting new multicore design alternatives. In special, heterogeneous multicore architectures have attracted a lot of attention but developing applications for such architectures is not an easy task due to the lack of appropriate tools and programming models. We present the design of a runtime system for the Cell/BE architecture that works with memory transactions. Transactional programs are automatically instrumented by the compiler, shortening development time and avoiding synchronization mistakes usually present in lock-based approaches (such as deadlock). Experimental results conducted with a prototype implementation and the STAMP benchmark show good scalability for applications with moderate to low contention levels, and whose transactions are not too small. For those cases in which a small performance loss is admissible, we believe that the ease of programming provided by transactions greatly pays off. (C) 2012 Elsevier B.V. All rights reserved.en
dc.description.sponsorshipIBM-
dc.description.sponsorshipConselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)-
dc.description.sponsorshipFundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)-
dc.format.extent1535-1546-
dc.language.isoeng-
dc.publisherAcademic Press Inc. Elsevier B.V.-
dc.sourceWeb of Science-
dc.subjectMultiprocessorsen
dc.subjectParallel programmingen
dc.subjectTransactional memoryen
dc.titleA transactional runtime system for the Cell/BE architectureen
dc.typeoutro-
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)-
dc.contributor.institutionUniversidade Estadual de Campinas (UNICAMP)-
dc.description.affiliationUniv Estadual Paulista, UNESP, Rio Claro, Brazil-
dc.description.affiliationUniv Estadual Campinas, UNICAMP, Campinas, SP, Brazil-
dc.description.affiliationUnespUniv Estadual Paulista, UNESP, Rio Claro, Brazil-
dc.description.sponsorshipIdFAPESP: 11/19373-6-
dc.identifier.doi10.1016/j.jpdc.2012.08.001-
dc.identifier.wosWOS:000310669600001-
dc.rights.accessRightsAcesso restrito-
dc.relation.ispartofJournal of Parallel and Distributed Computing-
Appears in Collections:Artigos, TCCs, Teses e Dissertações da Unesp

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