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Please use this identifier to cite or link to this item: http://acervodigital.unesp.br/handle/11449/65367
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dc.contributor.authorLima, J. A. de-
dc.date.accessioned2014-05-27T11:19:32Z-
dc.date.accessioned2016-10-25T18:14:56Z-
dc.date.available2014-05-27T11:19:32Z-
dc.date.available2016-10-25T18:14:56Z-
dc.date.issued1998-01-01-
dc.identifierhttp://dx.doi.org/10.1109/ISCAS.1998.706952-
dc.identifier.citationProceedings - IEEE International Symposium on Circuits and Systems, v. 2, p. 374-377.-
dc.identifier.issn0271-4310-
dc.identifier.urihttp://hdl.handle.net/11449/65367-
dc.identifier.urihttp://acervodigital.unesp.br/handle/11449/65367-
dc.description.abstractTrade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance.en
dc.format.extent374-377-
dc.language.isoeng-
dc.sourceScopus-
dc.subjectCapacitance-
dc.subjectComputer simulation-
dc.subjectComputer software-
dc.subjectElectric currents-
dc.subjectElectric network analysis-
dc.subjectElectric network synthesis-
dc.subjectMOSFET devices-
dc.subjectWaveform analysis-
dc.subjectCascode current sources-
dc.subjectRegulation-loop frequency-
dc.subjectSoftware package PSPICE-
dc.subjectDigital to analog conversion-
dc.titleOn optimizing micropower MOS regulated cascode circuits on switched current techniquesen
dc.typeoutro-
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)-
dc.description.affiliationUniversidade Estadual Paulista, Sao Paulo-
dc.description.affiliationUnespUniversidade Estadual Paulista, Sao Paulo-
dc.identifier.doi10.1109/ISCAS.1998.706952-
dc.identifier.wosWOS:000075224600246-
dc.rights.accessRightsAcesso restrito-
dc.relation.ispartofProceedings - IEEE International Symposium on Circuits and Systems-
dc.identifier.scopus2-s2.0-0031645536-
Appears in Collections:Artigos, TCCs, Teses e Dissertações da Unesp

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