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Please use this identifier to cite or link to this item: http://acervodigital.unesp.br/handle/11449/70589
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dc.contributor.authorSoares, Jurandir de O.-
dc.contributor.authorCanesin, Carlos A.-
dc.contributor.authorFreitas, Luiz C. de-
dc.date.accessioned2014-05-27T11:23:40Z-
dc.date.accessioned2016-10-25T18:26:02Z-
dc.date.available2014-05-27T11:23:40Z-
dc.date.available2016-10-25T18:26:02Z-
dc.date.issued2008-09-29-
dc.identifierhttp://dx.doi.org/10.1109/PESC.2008.4592554-
dc.identifier.citationPESC Record - IEEE Annual Power Electronics Specialists Conference, p. 3843-3849.-
dc.identifier.issn0275-9306-
dc.identifier.urihttp://hdl.handle.net/11449/70589-
dc.identifier.urihttp://acervodigital.unesp.br/handle/11449/70589-
dc.description.abstractIn this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. The proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. Finally, the proposed control strategy is verified through experimental results from an implemented prototype. ©2008 IEEE.en
dc.format.extent3843-3849-
dc.language.isoeng-
dc.sourceScopus-
dc.subjectActive power-factor correction-
dc.subjectDigital control-
dc.subjectFPGA device-
dc.subjectHybrid rectifier-
dc.subjectHysteresis modulation-
dc.subjectAC generator motors-
dc.subjectComputer hardware description languages-
dc.subjectDigital arithmetic-
dc.subjectDigital control systems-
dc.subjectElectric power factor-
dc.subjectElectric power factor correction-
dc.subjectField programmable gate arrays (FPGA)-
dc.subjectModulation-
dc.subjectPower electronics-
dc.subjectRectifying circuits-
dc.subjectAlternate current-
dc.subjectControl strategies-
dc.subjectControl techniques-
dc.subjectDigital controls-
dc.subjectDiode rectifiers-
dc.subjectField programmable gate array-
dc.subjectFPGA devices-
dc.subjectHardware description language-
dc.subjectInput currents-
dc.subjectInput power factor-
dc.subjectInternational Standards-
dc.subjectMode converters-
dc.subjectOutput powers-
dc.subjectPower factor corrections-
dc.subjectPower ratings-
dc.subjectThree-phase rectifiers-
dc.subjectTotal Harmonic Distortion-
dc.subjectElectric rectifiers-
dc.titleA true programmable HPF hybrid three-phase rectifieren
dc.typeoutro-
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)-
dc.contributor.institutionUniversidade Federal de Uberlândia (UFU)-
dc.description.affiliationSão Paulo State University - UNESP FEIS/DEE, P.O. Box 31, Ilha Solteira (SP)-
dc.description.affiliationFederal University of Uberlândia Faculty of Elect. Engineering - FEELT, Uberlândia (MG)-
dc.description.affiliationUnespSão Paulo State University - UNESP FEIS/DEE, P.O. Box 31, Ilha Solteira (SP)-
dc.identifier.doi10.1109/PESC.2008.4592554-
dc.identifier.wosWOS:000260398502154-
dc.rights.accessRightsAcesso restrito-
dc.relation.ispartofPESC Record - IEEE Annual Power Electronics Specialists Conference-
dc.identifier.scopus2-s2.0-52349105778-
Appears in Collections:Artigos, TCCs, Teses e Dissertações da Unesp

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