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Please use this identifier to cite or link to this item: http://acervodigital.unesp.br/handle/11449/73120
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dc.contributor.authorBatista, E. A.-
dc.contributor.authorGonda, L.-
dc.contributor.authorSilva, A. C. R.-
dc.contributor.authorRossi, S. R.-
dc.contributor.authorPereira, M. C.-
dc.contributor.authorCarvalho, A. A. de-
dc.contributor.authorCugnasca, C. E.-
dc.date.accessioned2014-05-27T11:26:21Z-
dc.date.accessioned2016-10-25T18:36:27Z-
dc.date.available2014-05-27T11:26:21Z-
dc.date.available2016-10-25T18:36:27Z-
dc.date.issued2012-01-01-
dc.identifierhttp://dx.doi.org/10.1016/j.csi.2011.05.009-
dc.identifier.citationComputer Standards and Interfaces, v. 34, n. 1, p. 1-13, 2012.-
dc.identifier.issn0920-5489-
dc.identifier.urihttp://hdl.handle.net/11449/73120-
dc.identifier.urihttp://acervodigital.unesp.br/handle/11449/73120-
dc.description.abstractThis work describes a hardware/software co-design system development, named IEEE 1451 platform, to be used in process automation. This platform intends to make easier the implementation of IEEE standards 1451.0, 1451.1, 1451.2 and 1451.5. The hardware was built using NIOS II processor resources on Alteras Cyclone II FPGA. The software was done using Java technology and C/C++ for the processors programming. This HW/SW system implements the IEEE 1451 based on a control module and supervisory software for industrial automation. © 2011 Elsevier B.V.en
dc.format.extent1-13-
dc.language.isoeng-
dc.sourceScopus-
dc.subjectFPGA-
dc.subjectIEEE 1451 standard-
dc.subjectIntelligent transducers-
dc.subjectNIOS II processor-
dc.subjectControl module-
dc.subjectHardware/software co-design-
dc.subjectIEEE standards-
dc.subjectIEEE-1451-
dc.subjectIn-process-
dc.subjectIndustrial automation-
dc.subjectJava technologies-
dc.subjectNetwork-based-
dc.subjectNIOS II-
dc.subjectProcessor resources-
dc.subjectComputer software-
dc.subjectJava programming language-
dc.subjectStandards-
dc.subjectStorms-
dc.subjectField programmable gate arrays (FPGA)-
dc.titleHW/SW for an intelligent transducer network based on IEEE 1451 standarden
dc.typeoutro-
dc.contributor.institutionUniversidade Federal de Mato Grosso do Sul (UFMS)-
dc.contributor.institutionUniversidad Nacional del Centro de Buenos Aires (UNICEN)-
dc.contributor.institutionUniversidade Estadual Paulista (UNESP)-
dc.contributor.institutionUniversidade Católica Dom Bosco (UCDB)-
dc.contributor.institutionUniversidade de São Paulo (USP)-
dc.description.affiliationFederal University of Mato Grosso Do sul Dept. of Electrical Engineering, Campo Grande-MS-
dc.description.affiliationFederal University of Mato Grosso Do sul College of Computing, Campo Grande-MS-
dc.description.affiliationUniversity of São Paulo State Dept. of Electrical Engineering, Ilha Solteira-SP-
dc.description.affiliationCenter of Buenos Aires Province National University Dept. of Electro-Mechanical Engineering-
dc.description.affiliationDom Bosco Catholic University Computer and Engineering Research Group, Campo Grande-MS-
dc.description.affiliationPolytechnic School University of São Paulo, São Paulo-SP-
dc.identifier.doi10.1016/j.csi.2011.05.009-
dc.rights.accessRightsAcesso restrito-
dc.relation.ispartofComputer Standards and Interfaces-
dc.identifier.scopus2-s2.0-81855217574-
Appears in Collections:Artigos, TCCs, Teses e Dissertações da Unesp

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